Computer Architecture and Organization

Computer Architecture (The Blueprint):

This is what the programmer sees. It answers "What does the computer do?"

• Includes: Instruction set, data formats, addressing modes.
• Analogy: Designing the steering wheel, pedals, and dashboard of a car. You know what pressing the gas does.

Computer Organization (The Engine):

This is the actual hardware implementation. It answers "How does the computer do it?"

• Includes: Control signals, memory technology, circuit design.
• Analogy: The physical engine, pistons, and fuel lines hidden under the hood.

Note: Two computers can have the EXACT same Architecture (e.g., both are x86 Intel) but totally different Organizations (e.g., an i3 vs an i9 processor)..

1. Fixed-Point Representation (The Rigid Number):

The decimal point (or binary point) is completely frozen in place.

• If frozen at the far right: It's an Integer (e.g., 1011.0).
• If frozen at the far left: It's a Fraction (e.g., 0.1011).
• Pros/Cons: Very fast for the CPU to calculate, but terrible for very large or very microscopic numbers.

2. Floating-Point Representation (Scientific Notation for CPUs):

The decimal point can "float" anywhere to handle massive numbers (like distances between stars) or tiny numbers (like atom sizes).

It splits the 32-bit register into 3 chunks:

• 1. Sign Bit: 0 for positive, 1 for negative.
• 2. Exponent: The power to raise the base to (e.g., 10^5).
• 3. Mantissa: The actual significant digits.
• Format: Value = Mantissa × Base^Exponent

Complements are a clever mathematical trick CPUs use so they don't need a dedicated "subtraction" circuit. They just add the negative version of the number!

1. The 1's Complement (The Flipper):

• Extremely simple: Just flip every 0 to a 1, and every 1 to a 0.
• Example: 10110 becomes 01001.
• Flaw: It creates two versions of zero (+0 and -0), which confuses the CPU.

2. The 2's Complement (The Gold Standard):

• Fixes the zero flaw. It is universally used by modern computers for negative numbers.
• How to find it: First find the 1's complement, then simply ADD +1 to it.
• Example: 10110 → 01001 + 1 = 01010.

Register Transfer Language (RTL) is a pseudo-code used by hardware engineers to describe exactly how data physically moves inside the CPU.

Common Syntax:

• R1 ← R2 : Copy the data from Register 2 and paste it into Register 1. (R2 is not erased).
• P: R1 ← R2 : A conditional transfer. The copy ONLY happens if the control signal P is active (equal to 1).
• M[AR] : Refers to the specific slot in Memory M located at the address currently sitting in the Address Register AR.

If a CPU has 50 registers, wiring every single register directly to each other would require thousands of messy wires. Instead, we use a single Common Bus (a digital highway) that everyone shares.

Three-State Buffers (The Traffic Lights):

To prevent data collisions on the shared highway, we attach a "Three-State Buffer" to the exit of every register. It has 3 states:

• 1. Logic 1 (High): Outputs a 1.
• 2. Logic 0 (Low): Outputs a 0.
• 3. High-Impedance (Hi-Z): This acts like a physical scissors cutting the wire. It completely disconnects the register from the bus.

How it works: The CPU's Control Unit ensures that only one register's buffer is active at a time, while all 49 other registers are forced into the disconnected Hi-Z state.

A Micro-operation is the absolute most basic, microscopic action a CPU can take. It happens in exactly one clock cycle. They fall into 4 groups:

1. Register Transfer:

Simply moving data around without altering it. (e.g., R1 ← R2).

2. Arithmetic:

Basic math like addition, subtraction, or incrementing. (e.g., R1 ← R1 + R2).

3. Logic:

Bit-level manipulation used to flip, clear, or mask bits using AND, OR, XOR. (e.g., R1 ← R1 ⊕ R2).

4. Shift:

Moving all the bits in a register sideways.

• Example: Shifting 0010 (Decimal 2) one spot to the left makes it 0100 (Decimal 4). It's a hyper-fast way to multiply by 2!

The Core Registers:

• 1. PC (Program Counter): The bookmark. It always points to the next instruction's address.
• 2. IR (Instruction Register): The waiting room. It holds the current instruction being executed.
• 3. AR (Address Register): Tells the memory where to look.
• 4. AC (Accumulator): The main workspace register for the ALU to do math.

The Instruction Cycle (The Heartbeat of the CPU):

• 1. Fetch: Go to memory, grab the instruction, put it in the IR, and +1 the PC.
• 2. Decode: The Control Unit reads the instruction (e.g., "0101") and figures out it means "ADD".
• 3. Read Effective Address: If the instruction is a treasure map pointing to another map (Indirect Address), go find the final location of the data.
• 4. Execute: Feed the data to the ALU, do the math, and save the result.

General Register Organization:

Instead of having just one Accumulator register doing all the work, modern CPUs have a whole team of "General Purpose Registers" (e.g., R1, R2, R3).

How they connect (The MUX setup):

• 1. All these registers feed into two giant Multiplexers (MUX A and MUX B).
• 2. The Control Unit tells the MUXes which two registers to select.
• 3. These two selected registers are routed directly into the ALU (Arithmetic Logic Unit).
• 4. The ALU does the math, and the result is routed back to a destination register via a Result Bus.

Advantage: The CPU can do complex math completely internally without ever wasting time fetching data from the slow RAM.

A Stack is a special chunk of memory that operates purely on a LIFO (Last-In, First-Out) basis.

Analogy: Think of a stack of plates at a buffet. You can only take the top plate, and you can only put a new plate on the top.

The Stack Pointer (SP):

A special CPU register that always points to the very top item of the stack.

Two Core Operations:

• 1. PUSH (Add to stack):
• First, decrement the SP (move the pointer up).
• Then, write the new data exactly where the SP is pointing.
• 2. POP (Remove from stack):
• First, read the data where the SP is currently pointing.
• Then, increment the SP (move the pointer down to the next item).

Uses: Stacks are incredibly useful for handling subroutine calls (remembering where to return) and evaluating complex math equations.

Instructions tell the CPU what to do. They can be categorized by how many "Addresses" (operands) they explicitly mention:

1. Three-Address Instructions:

Mentions everything. ADD R1, R2, R3 (Add R2 and R3, save to R1).

Pros: Very short programs. Cons: Instructions are physically very wide/large.

2. Two-Address Instructions:

The destination is also one of the sources. ADD R1, R2 (Add R1 and R2, overwrite R1 with the result).

3. One-Address Instructions:

Implies the use of an Accumulator. ADD X (Add the value at memory X to the Accumulator, and save it in the Accumulator).

4. Zero-Address Instructions:

Used purely in Stack-based computers. ADD (Pop the top two items off the stack, add them, and Push the result back on top).

Addressing Modes define the "treasure hunt" rules for how the CPU finds the data it needs to execute an instruction.

1. Immediate Mode:

No hunting needed. The data is hardcoded directly inside the instruction itself. ADD 5 (Just add the literal number 5).

2. Register Mode:

The instruction points to a CPU register (like R1). Super fast because it never touches RAM.

3. Direct Addressing Mode:

The instruction contains the exact RAM address of the data. LOAD [1050] (Go to locker #1050 and grab the data). Requires 1 memory trip.

4. Indirect Addressing Mode:

The instruction points to a memory address, but that address just holds another address. LOAD [[1050]] (Go to locker #1050, find a note saying "Go to locker #2000"). Requires 2 memory trips, but allows for massive flexibility (like Pointers in C).

**RISC (Reduced Instruction Set Computer) — The Sports Car:**

• Philosophy: Keep it simple, uniform, and blisteringly fast. Give the programmer a small set of basic LEGO blocks.
• Traits: All instructions are the exact same length. They execute in exactly 1 clock cycle. Heavily relies on registers. Hardwired control.
• Examples: ARM (in your smartphone), Apple Silicon (M1/M2/M3).

**CISC (Complex Instruction Set Computer) — The Swiss Army Knife:**

• Philosophy: Give the programmer highly complex, powerful instructions that do multiple things at once to save code space.
• Traits: Instructions have variable lengths. One instruction might take 10 clock cycles to finish. Uses microprogrammed control.
• Examples: Intel x86 (in traditional PC/laptops).

CPU Pipelining is an implementation technique where multiple instructions are overlapped in execution. It takes a massive, slow task and breaks it into smaller, fast sub-tasks (stages) executed simultaneously by different hardware.

The Laundry Assembly Line Analogy:

Imagine you have 4 loads of laundry to do. The sequence is: Wash → Dry → Fold → Put Away.

• Without Pipelining (Sequential): You wash load 1, wait for it to dry, fold it, put it away. ONLY THEN do you put load 2 in the washer. This takes forever.
• With Pipelining: You put load 1 in the washer. As soon as load 1 goes into the dryer, the washer is empty, so you immediately throw load 2 into the washer! By the time load 1 is being put away, load 2 is being folded, load 3 is drying, and load 4 is washing.

Result: The time to complete one individual load doesn't change, but the total Throughput (loads completed per hour) skyrockets!

1. Arithmetic Pipeline (For Heavy Math):

Used to break down highly complex mathematical operations into smaller sub-operations.

• Example: Floating-point addition. Instead of doing it in one massive circuit, you pipeline it: Stage 1 compares exponents, Stage 2 aligns mantissas, Stage 3 adds mantissas, Stage 4 normalizes the result.

2. Instruction Pipeline (For Program Execution):

Breaks down the execution of software instructions into overlapping stages.

• A classic 4-stage pipeline: FI (Fetch Instruction) → DA (Decode & fetch Address) → FO (Fetch Operand) → EX (Execute).
• While the CPU is Executing instruction 1, it's simultaneously Fetching the Operands for instruction 2, Decoding instruction 3, and Fetching instruction 4 from memory.

A Hazard is a situation that prevents the next instruction from executing during its designated clock cycle, causing the pipeline to stall (creating a "bubble").

1. Structural Hazard (Resource Conflict):

Happens when two instructions in the pipeline need to use the exact same piece of hardware at the exact same time (e.g., both need to read from memory simultaneously).

2. Data Hazard (The Dependency Problem):

Happens when an instruction needs data that hasn't been calculated by the previous instruction yet.

• Example: Instruction 1 says X = 5 + 5. Instruction 2 says Y = X + 2. Instruction 2 CANNOT execute until Instruction 1 fully finishes writing 10 to X.

3. Control Hazard (The Branching Problem):

Happens during an IF/ELSE jump. The pipeline fetches instructions in advance assuming we go straight down the code. If a condition triggers a jump to a totally different part of the code, the pipeline grabbed the wrong instructions! It has to flush them all out and start over.

Computers are efficient. Instead of building one massive circuit for addition and a totally separate massive circuit for subtraction, engineers use the 2's Complement method to combine them into one unit.

The Adder/Subtractor Circuit:

• 1. It uses a row of Full Adders.
• 2. It has a special Mode Control Bit (M).
• 3. The B-inputs (the second number) pass through XOR gates along with the M bit.

How it works:

• If M = 0 (Addition): The XOR gates act as transparent windows. B passes through unchanged. The circuit calculates A + B.
• If M = 1 (Subtraction): The XOR gates act as inverters, flipping every bit of B (1's complement). The M=1 also sneaks into the first adder's carry-in, effectively adding +1. This creates the 2's complement of B. The circuit calculates A + (-B), which is just A - B!

Booth's Algorithm is a genius technique for multiplying signed binary numbers (numbers that can be positive or negative) efficiently using 2's complement.

Instead of just blindly adding the multiplicand over and over, Booth looks at the multiplier bits in pairs (the current bit Q0 and the previous bit Q-1).

The Rules of Booth:

• 1. If it sees 00 or 11: It does nothing (just an Arithmetic Shift Right).
• 2. If it sees 01: It signifies the end of a string of 1s. It Adds the multiplicand to the accumulator, then shifts right.
• 3. If it sees 10: It signifies the start of a string of 1s. It Subtracts the multiplicand from the accumulator, then shifts right.

Why it's clever: If you multiply by 01111110 (lots of ones in a row), a normal multiplier does 6 additions. Booth's algorithm just does 1 subtraction at the start of the 1s, and 1 addition at the end, saving massive amounts of processing time!